Jetson Optimize Memory
NVIDIAOfficialCreated by Jetson TeamDistributed by NVIDIA
- Skill
- Workflow
- Cloud and DevOps
- Apache-2.0
- Medium risk
AutoGineer summary
Written by AutoGineer from the skill’s own files, not by the author
This skill provides a structured procedure to optimize memory usage on NVIDIA Jetson platforms by disabling unused hardware subsystems. By modifying MB1 BCT, MB2 BCT, kernel reserved-memory, and SWIOTLB configurations, users can reclaim DRAM carveouts that are typically reserved for features like display or camera pipelines. It is intended for headless or specialized deployments where these peripherals are not required, ensuring that memory is freed for application use while maintaining system stability.
What it does
- Provides recipes to disable display-related carveouts for headless deployments.
- Provides recipes to disable camera-related carveouts for no-camera deployments.
- Guides the user through modifying MB1 and MB2 BCT files to zero out carveouts.
- Instructs on disabling kernel reserved-memory nodes for specific hardware.
- Provides instructions for adjusting the SWIOTLB DMA bounce pool size.
- Includes mandatory verification steps to ensure changes are correctly applied and stable.
When to use it
- When deploying a Jetson module in a headless environment without a display.
- When deploying a Jetson module that does not require camera or ISP functionality.
- When you need to maximize available DRAM for compute-intensive applications.
- When you need to adjust the SWIOTLB pool size for specific peripheral DMA requirements.
Advantages
- Increases available system memory by removing unnecessary hardware reservations.
- Reduces the memory footprint of the OS for specialized embedded deployments.
- Provides a systematic, multi-layer approach to ensure boot-time stability.
- Includes verification procedures to prevent boot failures and DMA errors.
Usage examples
- “I am deploying an Orin Nano in a headless configuration. How do I reclaim the memory reserved for display?”
- The agent will guide you through the headless recipe, including disabling DCE-family carveouts in MB1/MB2 BCT and disabling the display node in the kernel DTS.
- “How can I reduce the memory footprint of my Jetson Thor deployment by disabling camera subsystems?”
- The agent will provide the no-camera recipe for T264, detailing which RCE and VI/ISP carveouts to zero out and which kernel nodes to disable.
Install
Download the skill as a ZIP:
https://autogineer.com/agent-skills/nvidia/jetson-optimize-memory/downloadUnzip it into the cross-client skills folder of your project:
mkdir -p .agents/skills && unzip jetson-optimize-memory.zip -d .agents/skills
Documentation by Jetson Team
jetson-optimize-memory
Memory is reserved across four layers ordered by boot chronology (higher row = earlier in boot, closer to hardware):
| Layer | Content | Key files |
|---|---|---|
| MB1 BCT | firmware carveouts | per-module misc DTS |
| MB2 BCT | firmware loading + AST controls | per-module misc DTS |
| Kernel DTS | reserved-memory and driver binding | per-module DTS |
| SWIOTLB | DMA bounce pool size | <module>.conf.common (CMDLINE_ADD) |
Critical rules:
Only the scenarios in Scenario recipes are validated. Refuse any request to disable a carveout/cluster/node not in that table.
Zeroing a carveout requires both: disabling the cluster's loading controls AND removing the AST that references it.
Emit explicit overrides for every cluster in the recipe, regardless of how the source
#ifdef/#elselooks. Verify the merged binary.GPU SW stack must match the chip: T234 -> nvgpu, T264 and later -> OpenRM. Follow the shared derived-platform rule in
target-platform-contract.md; stop on mismatches instead of guessing.Do not set SWIOTLB to 0 — some peripherals can't use the IOMMU.
Scenario recipes
| Keyword | MB1 BCT carveouts | MB2 BCT | Kernel DTS |
|---|---|---|---|
headless | DCE-family (see chip table) | DCE auxp_controls + DCE AST(s) | display@<addr> (and dce@<addr> if exposed) → disabled |
no-camera | RCE/VI/ISP-family | RCE auxp_controls (each instance) + RCE AST(s) | recommended: VI/ISP/NVCSI → disabled |
Chip-specific carveouts
| Scenario | T234 (Orin) | T264 (Thor) |
|---|---|---|
headless | CARVEOUT_BPMP_DCE, CARVEOUT_DCE, CARVEOUT_DCE_TSEC, CARVEOUT_TSEC_DCE, CARVEOUT_DISP_EARLY_BOOT_FB | CARVEOUT_DCE, CARVEOUT_TSEC_DCE, CARVEOUT_HPSE_DCE, CARVEOUT_DISP_EARLY_BOOT_FB |
no-camera | CARVEOUT_RCE, CARVEOUT_CAMERA_TASKLIST | CARVEOUT_RCE, CARVEOUT_RCE1, CARVEOUT_RCE_RW, CARVEOUT_VI_TASKLIST, CARVEOUT_VI1_TASKLIST, CARVEOUT_ISP_TASKLIST, CARVEOUT_ISP1_TASKLIST |
Post-boot:
headless→sudo systemctl set-default multi-user.target.
MB1 BCT carveout overrides
File: Linux_for_Tegra/bootloader/generic/BCT/tegra<chip>-mb1-bct-misc-<module>.dts
(e.g. tegra234-mb1-bct-misc-p3767-0000.dts for Orin Nano,
tegra264-mb1-bct-misc-p3834-0008-p4071-0000.dts for Thor).
For each carveout, add inside the existing carveout node:
aux_info@<CARVEOUT_NAME> {
pref_base = <0x0 0x0>;
size = <0x0 0x0>;
alignment = <0x0 0x0>;
};MB2 BCT cluster + AST overrides
File: Linux_for_Tegra/bootloader/generic/BCT/tegra<chip>-mb2-bct-misc-<module>.dts
(includes tegra<chip>-mb2-bct-common.dtsi).
For each target cluster:
Override
auxp_controls@<index>:auxp_controls@<index> { enable_init = <0>; enable_fw_load = <0>; enable_unhalt = <0>; };/delete-node/ auxp_ast_config@<idx>;
Look up indices in common.dtsi: auxp_controls@N carries a comment
naming its cluster; auxp_ast_config@N has ast_region children whose
carveout = <CARVEOUT_…>; lines identify the owner.
Kernel DT reserved-memory
DTB=Linux_for_Tegra/kernel/dtb/<platform-dtb-name>.dtb
dtc -I dtb -O dts -o /tmp/platform.dts $DTB
# edit: status = "disabled" on target nodes
dtc -I dts -O dtb -o $DTB /tmp/platform.dtsDisplay — disable display@<addr>, plus dce@<addr> if exposed as
a separate kernel node.
Camera — under host1x@<addr>, disable whichever of vi* / isp*
/ nvcsi exist on the BSP (only emit present nodes):
Locate the display controller node in the decompiled DTS and disable it.
The node's unit address is chip-specific — find it by compatible string
(e.g. nvidia,tegra234-display) rather than hard-coding the address.
host1x@<addr> {
vi0@<addr> { status = "disabled"; };
vi1@<addr> { status = "disabled"; };
isp@<addr> { status = "disabled"; };
isp1@<addr> { status = "disabled"; };
nvcsi@<addr> { status = "disabled"; };
};SWIOTLB DMA bounce pool
The NVIDIA IOMMU covers peripheral DMA, so SWIOTLB is rarely used.
Edit CMDLINE_ADD (never CMDLINE) in Linux_for_Tegra/<module>.conf.common:
# Total bytes = swiotlb_value × 2048; 4 MiB pool:
CMDLINE_ADD="... swiotlb=2048"Override verification (mandatory)
After every patched MB1/MB2 BCT .dts, reproduce the BSP's compile +
decompile using the same -D… flags from bct_flags.append(...) in
bootloader/tegraflash_impl_t<chip>.py:
gcc -E -nostdinc -x assembler-with-cpp \
-DENABLE_<FLAG_1> -DENABLE_<FLAG_2> \
-I bootloader -I bootloader/generic/BCT \
-o /tmp/cpp.dts <patched-bct.dts>
dtc -q -I dts -O dtb -o /tmp/cpp.dtb /tmp/cpp.dts
dtc -q -I dtb -O dts /tmp/cpp.dtb | lessConfirm in the merged output:
Each zeroed
aux_info@<NAME>(oraux_info@<id>Upost macro expansion) hassize = <0x0 0x0>andpref_base = <0x0 0x0>.Each disabled
auxp_controls@<idx>has all threeenable_*fields<0>.Each
/delete-node/'dauxp_ast_config@<idx>is absent.
Verification (on booted target)
sudo cat /proc/iomem | grep -iE 'nv-reserved|cma|fb|carveout'
ls /proc/device-tree/reserved-memory/
dmesg | grep -iE 'firmware|carveout|bpmp|reserved|fail|error' | head -20
free -m| Scenario | Sysfs | dmesg grep |
|---|---|---|
| Display off | ls /sys/class/drm/ (empty) | tegra-drm|nvdisplay|dce|host1x|fb0 |
| Camera off | ls /dev/video* 2>/dev/null (none) | rce|nvcsi|tegra-camera|vi0|vi1|isp |
| SWIOTLB shrink | cat /sys/kernel/debug/swiotlb/io_tlb_nslabs matches cmdline | swiotlb |
For SWIOTLB: /proc/cmdline must contain swiotlb=<value>, and
watch -n5 cat /sys/kernel/debug/swiotlb/io_tlb_used must stay under
io_tlb_nslabs during full workload — if exceeded, restore original
CMDLINE_ADD and re-flash kernel-dtb.
Purpose
Cut the unused DRAM carveouts that ship enabled in the reference BSP when a Jetson deployment skips display, camera, or other peripherals, freeing the freed bytes for the application. Always edits the four layers in boot order so an early-stage carveout never outranks a later-stage shrink.
Prerequisites
Active target profile resolved per
../../context/target-platform-contract.md.BSP image extracted and source tree initialized (
/jetson-init-image,/jetson-init-sourcecomplete).For headless / no-camera recipes: confirm the workload truly does not need display or camera.
Limitations
Only the validated recipes (
headless,no-camera,swiotlb) are exposed; ad-hoc subsystem disables outside the recipe set are refused.SWIOTLB shrink is bounded by peak in-flight DMA — exceeding the new
io_tlb_nslabsrequires reverting the change.BPMP-DTB edits land in the overlay tracker only after Customize + Build + Deploy run; this skill does not flash on its own.
Troubleshooting
Boot fails after MB1 BCT carveout disable — restore the pristine misc DTS and re-flash; the missing carveout is mandatory for the active SoC.
io_tlb_usedexceedsio_tlb_nslabs— revertswiotlb=inCMDLINE_ADDand re-flash the kernel DTB partition.Reclaimed delta smaller than expected — verify the recipe truly matched the deployment (e.g. display still attached); use the
dmesg | grep -iE 'firmware|carveout'check in this file to confirm.Validation
dmesgshows the disabled subsystem still probing — the change probably did not promote through tobsp_image; re-run/jetson-promote-image.
Files
- ATTRIBUTION.mdAdded by AutoGineer929 B
- BENCHMARK.md3.7 KiB
- LICENSELicence file added by AutoGineer11.2 KiB
- SKILL.md8.0 KiB
- evals/evals.json4.8 KiB
- skill-card.md3.6 KiB
- skill.oms.sig4.5 KiB
BENCHMARK.md
Evaluation Report
Evaluation of the jetson-optimize-memory skill before publication through NVSkills-Eval.
This benchmark summarizes 3-Tier Evaluation from NVSkills-Eval results for the skill. The goal is to document whether the skill is safe, discoverable, effective, and useful for agents before it is published for broader workflow use.
Evaluation Summary
Skill:
jetson-optimize-memoryEvaluation date: 2026-06-16
NVSkills-Eval profile:
externalEnvironment:
astra-sandboxDataset: 2 evaluation tasks
Attempts per task: 1
Pass threshold: 50%
Overall verdict: PASS
Agents Used
claude-codecodex
Metrics Used
Reported benchmark dimensions:
Security: checks whether skill-assisted execution avoids unsafe behavior such as secret leakage, destructive commands, or unauthorized access.
Correctness: checks whether the agent follows the expected workflow and produces the correct final output.
Discoverability: checks whether the agent loads the skill when relevant and avoids using it when irrelevant.
Effectiveness: checks whether the agent performs measurably better with the skill than without it.
Efficiency: checks whether the agent uses fewer tokens and avoids redundant work.
Underlying evaluation signals used in this run:
security(Security): checks for unsafe operations, secret leakage, and unauthorized access.skill_execution(Skill Execution): verifies that the agent loaded the expected skill and workflow.skill_efficiency(Efficiency): checks routing quality, decoy avoidance, and redundant tool usage.accuracy(Accuracy): grades final-answer correctness against the reference answer.goal_accuracy(Goal Accuracy): checks whether the overall user task completed successfully.behavior_check(Behavior Check): verifies expected behavior steps, including safety expectations.token_efficiency(Token Efficiency): compares token usage with and without the skill.
Test Tasks
The benchmark dataset contained 2 evaluation tasks:
Positive tasks: 2 tasks where the skill was expected to activate.
Negative tasks: 0 tasks where no skill was expected.
Unlabeled tasks: 0 tasks where positive/negative intent could not be inferred.
Task composition is derived from the evaluation dataset when possible. Entries with expected_skill set are treated as positive skill-activation cases, while entries with expected_skill: null are treated as negative activation cases.
Results
| Dimension | Num | claude-code | codex |
|---|---|---|---|
| Security | 2 | 100% (+0%) | 100% (+0%) |
| Correctness | 2 | 100% (+68%) | 91% (+30%) |
| Discoverability | 2 | 100% (+88%) | 72% (+21%) |
| Effectiveness | 2 | 73% (+53%) | 66% (+39%) |
| Efficiency | 2 | 94% (+69%) | 66% (+23%) |
Score values show skill-assisted performance. Values in parentheses show uplift versus the no-skill baseline when baseline data is available.
Tier 1: Static Validation Summary
Tier 1 validation passed with observations. NVSkills-Eval ran 1 checks and found 3 total findings.
Top findings:
MEDIUM SCHEMA/body_recommended_section: Missing recommended section: '## Instructions' (
skills/jetson-optimize-memory/SKILL.md)MEDIUM SCHEMA/body_recommended_section: Missing recommended section: '## Examples' (
skills/jetson-optimize-memory/SKILL.md)LOW SCHEMA/author_format: Author must be of the form 'Name <email@host>' (
skills/jetson-optimize-memory/SKILL.md)
Tier 2: Deduplication Summary
This tier was not run or did not produce findings in this report.
Publication Recommendation
The skill is suitable to proceed toward NVSkills-Eval publication based on this benchmark. Skill owners should keep this file with the skill and refresh it when the evaluation dataset, skill behavior, or target agents materially change.
Requirements and compatibility
Written for: Claude Code
Works with: Claude Code, Claude apps, OpenAI Codex, GitHub Copilot, Cursor, Gemini CLI, Kiro, OpenCode, Goose, Amp, Roo Code, JetBrains Junie, Factory Droid, Devin (ex-Windsurf), Mistral Vibe, OpenHands, Letta
“Works with” means the tool reads the open Agent Skills format; a skill written for one tool may use features others lack.
Needs: Claude Code frontmatter, Needs Node.js
Security
What our scanner noticed· Medium risk
- Large base64-encoded blobs
A static scan is not a guarantee. Skills are third-party content: review a skill before you let an agent use it.
Attribution and licence
- Created by
- Jetson Team
- Publisher
- NVIDIA (Official)
- Distributed by
- NVIDIA
- Source
- NVIDIA/skills · skills/jetson-optimize-memory · commit fce3cca
- Licence
- Apache License 2.0 (redistribution allowed)
- LICENSE (added by AutoGineer from LICENSE-APACHE)
- ATTRIBUTION.md (written by AutoGineer)
- Synced
AutoGineer is not affiliated with or endorsed by Jetson Team or NVIDIA.
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