Jetson Customize Pinmux
NVIDIAOfficialCreated by Jetson TeamDistributed by NVIDIA
- Skill
- Tool integration
- Cloud and DevOps
- Apache-2.0
- Medium risk
- Has scripts
AutoGineer summary
Written by AutoGineer from the skill’s own files, not by the author
The jetson-customize-pinmux skill provides a structured workflow for configuring per-pin SFIO, direction, and initial state for Jetson Orin or Thor custom carriers. It parses the official Tegra pinmux spreadsheet (XLSM) to generate the necessary BCT DTSI files (pinmux, gpio, and padvoltage). The skill ensures that pin configurations are accurately captured, validated, and integrated into the carrier's bootloader configuration, following a strict interactive process to prevent hardware misconfiguration.
What it does
- Parses Tegra pinmux XLSM files to establish a ground truth for SoC pin configurations.
- Provides an interactive lookup tool to identify pins by ball name, signal, or DT name.
- Guides users through a mandatory Q1-Q6 interactive loop to set pin attributes.
- Generates pinmux, gpio, and padvoltage BCT DTSI files for custom carrier boards.
- Updates carrier configuration references to include the newly generated DTSI files.
- Ensures configuration idempotency by using specific markers in the generated files.
When to use it
- When you need to repurpose a CVM ball (e.g., switching between GPIO and a peripheral function).
- After deriving a custom carrier and needing to apply specific pinmux settings from an XLSM.
- When a pin mismatch is reported by other Jetson customization skills.
- When you need to define initial pin states, drive types, or pull attributes for custom hardware.
Advantages
- Ensures consistency by using the official XLSM as the single source of truth.
- Prevents configuration errors through a mandatory, guided per-pin interactive process.
- Automates the complex generation of three distinct BCT DTSI files.
- Integrates cleanly with existing Jetson BSP workflows and overlay trackers.
Usage examples
- “Configure pin H10 on my custom carrier to act as a GPIO.”
- The agent will look up pin H10, confirm it is GPIO-capable, and prompt you through the required direction and initial state settings before generating the updated DTSI files.
- “I need to set the drive type for the PCIE4_RST_L signal.”
- The agent will identify the corresponding DT pin, check if the pad is configurable, and if so, guide you through the Q4-Q6 attributes including drive type.
Install
Download the skill as a ZIP:
https://autogineer.com/agent-skills/nvidia/jetson-customize-pinmux/downloadUnzip it into the cross-client skills folder of your project:
mkdir -p .agents/skills && unzip jetson-customize-pinmux.zip -d .agents/skills
Documentation by Jetson Team
Customize pinmux (per-pin SFIO / direction / state)
Overview
The Tegra pinmux spreadsheet (.xlsm) is the ground truth for every
CVM ball: SoC pin name, supported SFIOs, customer-selected function,
direction, and initial state. This skill parses that XLSM, runs a
per-pin Q1–Q6 interactive loop, and emits the three BCT DTSIs
(pinmux, gpio, padvoltage) in one shot into the overlay tracker
at <source.root_path>/Linux_for_Tegra/bootloader/.
Unlike sibling skills jetson-customize-uphy / jetson-customize-pcie /
jetson-customize-camera, pinmux has no kernel-DT overlay surface and no
ODMDATA edit. The XLSM is the source of truth; the three emitted
DTSIs land at flash time via the carrier conf's
PINMUX_CONFIG= / GPIOINT_CONFIG= / PMC_CONFIG= references (which
/jetson-derive-carrier set up).
Pad classification (silicon-fixed): only BD* and BI* pads have
configurable pull / drive / open-drain attributes. LP5XA_*,
UPHYDS_*, DP_SINGLE_*, BDMIPI16X_*, BDUSB2_*, OSCI27_* are
fixed-function and skip Q4–Q6 (configurable: no).
The bundled scripts/modify_pinmux.py is the workhorse: it parses
the XLSM via openpyxl>=3.1, builds the per-carrier pinmap JSON,
captures pin edits into a session shim, and (on generate) writes
the three DTSIs.
When to invoke
The user says "configure pin", "set SFIO", "edit pinmux DTSI", "set pin direction", "set initial state", or asks to repurpose a CVM ball (e.g. flip a pin between GPIO and a peripheral function).
A sibling skill (
jetson-customize-camera,jetson-customize-pcie,jetson-customize-usb,jetson-customize-mgbe) reports an HSIO pin mismatch viapin_verifier.pyand the user wants to fix it.The user pre-derived a custom carrier with
/jetson-derive-carrierand now wants to author the pinmux from a freshly-edited.xlsm.
Prerequisites:
Active profile selected (
target-platform/active_target.yml→<profile>.yamlwithreference_devkit:ANDcustom_carrier:).<source.root_path>/Linux_for_Tegra/exists as a git repo (/jetson-init-source)./jetson-derive-carrierhas run — the three pinmux-side BCT DTSIs (PINMUX_CONFIG,GPIOINT_CONFIG,PMC_CONFIGreferences in the carrier conf) exist in the overlay tracker.A pinmux
.xlsmis registered in the active profile atdocuments.custom_carrier_pinmux_xls(preferred when custom-carrier- specific) ordocuments.ref_devkit_pinmux_xls(fallback). The bundledmodify_pinmux.pyrequiresopenpyxl>=3.1.
Procedure
See references/procedure.md for the full
step-by-step procedure (Steps 1–8). Summary:
Resolve active target + XLSM. Validate active profile,
custom_carrier:, overlay-tracker prerequisites; resolve the pinmux.xlsmpath fromdocuments.custom_carrier_pinmux_xls→documents.ref_devkit_pinmux_xls→ single XLSM underdocuments.root_path→ user prompt.Probe. Run
modify_pinmux.py probeto parse the XLSM into the per-skill scratch<KB>/pinmap/<custom-carrier>.jsonplussession.jsonshim.Lookup. Resolve a free-form user query (CVM ball, Verilog name, signal, DT pin) via
modify_pinmux.py lookup; surface supported SFIO list, defaults, andconfigurable: yes/no.Set-pin (HARD GATE — Q1–Q6 via
AskUserQuestion). Q1–Q3 (sfio/direction/initial_state) always asked; Q4–Q6 (pull/drive_type/open_drain) only whenconfigurable: yes.tristateande_inputare derived fromdirection, never asked.Generate.
modify_pinmux.py generate --out-dir <source.root_path>/Linux_for_Tegra/bootloader/(root, notbootloader/generic/BCT/— derive-carrier.dtsforks live there, do not colocate). Emits:tegra<soc>-mb1-bct-{pinmux,gpio,padvoltage}-<carrier-key>.dtsi.<carrier-key>comes from the carrier conf'sPINMUX_CONFIG=reference, NOT the kebab-cased carrier name.Commit (single batched commit per workflow rule). All three DTSIs are one logical edit → one customization commit. Run the commit-preview gate before each commit.
Run-state sidecar + session shim. Write the user-facing
<profile-stem>.jetson-customize-pinmux.jsonsidecar and the transientsession.jsonshim under<workspace>/target-platform/.Summary. Emit the standard one-line + table summary.
Gotchas
No kernel-DT overlay; no
OVERLAY_DTB_FILEedit; norender_conf.pyhand-off. This skill ends at the three BCT DTSIs — the carrier conf already references them viaPINMUX_CONFIG=/GPIOINT_CONFIG=/PMC_CONFIG=(set up by/jetson-derive-carrier).Re-point the
.dtswrapper's#includeaftergenerate./jetson-derive-carrierforks the.dtswrappers atbootloader/generic/BCT/, but their#includelines may still pull the upstream devkit.dtsi(e.g.…-p3834-xxxx-p4071-0000.dtsi). Aftergeneratewrites the new<CARRIER_KEY>.dtsitobootloader/root, edit each wrapper's#includeto the new filename — by bare basename (#include "tegra<soc>-mb1-bct-pinmux-<CARRIER_KEY>.dtsi"), not../../…filesystem-relative. The BCT build'scpp -I bootloader/resolves bare basenames; that's the convention every other BCT include in the tree follows. Roll the wrapper edits into the same customization commit as the three DTSIs. Seereferences/procedure.mdStep 5 ("Sanity-check the carrier.dtswrapper").Q4–Q6 gated on
configurable: yes. Asking pull / drive_type / open_drain on a fixed-function pad (LP5XA_*,UPHYDS_*,BDMIPI16X_*, etc.) is silently dropped by the script and confuses the user.lookupprintsconfigurable: yes/no— always check it before prompting Q4–Q6.tristateande_inputare derived, never asked.unused→ tristate=ENABLE;input/bidirectional→ enable-input=ENABLE. Exposing them as separate prompts produces inconsistent DTSIs.sfio=gpiorequires a parseablegpio=GPIOn_PD.NNentry in the pinmap row'ssfiolist. Pins without one are GPIO-incapable silicon;set-pinrejects the call. Surface the rejection — don't silently fall back to a non-GPIO SFIO.Marker idempotency. Every per-pin edit carries
// custom-bsp: pinmuxon the closing brace; gpio default-state entries carry the same marker as a trailing comment. Re-runninggeneratemust detect and update — never duplicate.modify_pinmux.pyis unchanged from the original framework — it reads its ownsession.jsonshim under--kb-dir. The shim is regenerated each run from the active profile + the user-facing sidecar. Do not hand-edit the shim; it's transient.Multiple pinmux DTSI variants per Thor module SKU. Some carrier pins live in a different DTSI variant than the one the carrier conf references.
modify_pinmux.py commit(legacy patch-in-place flow) tolerates missing per-pin blocks viapinmux.warnings[]rather than failing. Surface the warning; point at the alternate DTSI variant.Don't touch the upstream BSP at
<bsp_image.root_path>. All edits land in<source.root_path>/Linux_for_Tegra/bootloader/under the pristine + customization commit pattern.
Available Scripts
| Script | Purpose | Arguments |
|---|---|---|
scripts/modify_pinmux.py | XLSM parser + per-pin DTSI generator. Invoked via run_script() from Steps 3-6 with the subcommand of the current phase. | probe | lookup | set-pin | apply | generate | commit [...] (see --help) |
scripts/generate_dtsi.py | Renders pinmux/GPIO/padvoltage DTSI fragments from the bundled session state. Called by modify_pinmux.py generate. | --session <path> --out-dir <dir> |
Invoke from the skill body as a subprocess via run_script():
# run_script: probe the carrier pinmux XLSM and write a session state
scripts/modify_pinmux.py probe --xlsm carrier.xlsm --session .pinmux-session.json
# run_script: render DTSI fragments from the final session state
scripts/modify_pinmux.py generate --session .pinmux-session.json --out-dir bsp_sources/pinmux/References
references/procedure.md— full Step 1–8 procedure prose.questions.json— Q1–Q6 prompt schema consumed by Step 4.../../references/platform_template.yaml—documents:block (ref_devkit_pinmux_xls,custom_carrier_pinmux_xls).../../context/bsp-customization-workflow.md— overlay edit protocol (single-commit per DTSI fork).../jetson-derive-carrier/SKILL.md— must run first; produces the pinmux / gpio / padvoltage DTSI forks this skill edits, and rewrites the carrier conf'sPINMUX_CONFIG=/GPIOINT_CONFIG=/PMC_CONFIG=lines to point at them.../jetson-init-source/SKILL.md— produces the overlay tracker this skill commits into.../jetson-link-docs/SKILL.md— author the profile'sdocuments:block, including the pinmux XLSM bindings.
Files
- ATTRIBUTION.mdAdded by AutoGineer932 B
- BENCHMARK.md3.9 KiB
- LICENSELicence file added by AutoGineer11.2 KiB
- SKILL.md9.5 KiB
- evals/evals.json4.0 KiB
- questions.json2.5 KiB
- references/procedure.md16.6 KiB
- scripts/_pinmux_common.pyScript8.2 KiB
- scripts/_pinmux_dt.pyScript8.9 KiB
- scripts/generate_dtsi.pyScript32.8 KiB
- scripts/modify_pinmux.pyScript29.4 KiB
- skill-card.md3.5 KiB
- skill.oms.sig5.9 KiB
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Requirements and compatibility
Written for: Claude Code
Works with: Claude Code, Claude apps, OpenAI Codex, GitHub Copilot, Cursor, Gemini CLI, Kiro, OpenCode, Goose, Amp, Roo Code, JetBrains Junie, Factory Droid, Devin (ex-Windsurf), Mistral Vibe, OpenHands, Letta
“Works with” means the tool reads the open Agent Skills format; a skill written for one tool may use features others lack.
Needs: Names Claude Code tools, Needs Python
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Attribution and licence
- Created by
- Jetson Team
- Publisher
- NVIDIA (Official)
- Distributed by
- NVIDIA
- Source
- NVIDIA/skills · skills/jetson-customize-pinmux · commit fce3cca
- Licence
- Apache License 2.0 (redistribution allowed)
- LICENSE (added by AutoGineer from LICENSE-APACHE)
- ATTRIBUTION.md (written by AutoGineer)
- Synced
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